New Paltz sign

Division of Engineering Programs
State University of New York - New Paltz

Baback A. Izadi, Ph.D.

Email: bai@engr.newpaltz.edu
Phone: (845) 257 - 3823
FAX : (845) 257 - 3730

Course Title: Digital Logic Fundamentals
Course Number:
EGC220
Credit: 3
Prerequisite: MAT251
Corequisite: EGC221

Fall 2021

Meeting Days: Monday - Thursday
Meeting Time:

  • 11:00 AM - 12:15 PM

Meeting Room:Wooster 221

 

Syllabus

Teaching Assistant

BulletBshara Dababneh dababneb1@newpaltz.edu

Activities prior to each lecture:

The course is setup in as a blended or a hybrid format. Therefore, it requires that, before attending each lecture session,
  1. you have a printed copy of PowerPoint lecture notes for that session,
  2. you have watched the assigned lecture videos in Blackboard (under Lecture Videos) and have made appropriate notes on your lecture notes,
  3. you have read the assigned textbook chapter and have attempted the assigned problems under Additional Activities.
The purpose of the lecture sessions is to discuss issues, answer questions, and help you solve problems. At the end of each lecture, you will take a quiz. Without following the outlined steps, it is unlikely you will benefit from the lecture session and therefore, very likely, will get a low quiz grade.

Textbook:

"Digital Design," online textbook by ZyBooks. Every student is required to subscribe within the first week. The book will be used partially to assign homework.

  1. Sign in or create an account at learn.zybooks.com
  2. Enter zyBook codeNEWPALTZEGC220IzadiFall2021
  3. Subscribe
A subscription is $58. Students may begin subscribing on Aug 12, 2020 and the cutoff to subscribe is Dec 08, 2019. Subscriptions will last until Jan 07, 2021.

Activities per each lecture:

Lecture Date

Lecture Note in Course Website

Lecture Video on Blackboard

Required Additional Activities

Class Notes

8/23/2021

Overview & Class policy

 

 

 

8/26/2021

1-Number systems

Lectures 1 & 2

Read text Chaper 1, Try Problems 1

 C_N_8-26-2021

8/30/2021

1-Number systems

Lectures 3 & 4

Read text Chaper 1, Try Problems 2

C_N_8-30-2021

9/2/2021

1-Number systems

Lectures 5 &6

Read text Chaper 1, Try Problems 3

C_N_9-2-2021

9/9/2021

2 - Boolean Logic

Lectures 7 & 8

Read text Chapter 2,  see sample operations, Try Problem 4

C_N_9-9-2021

9/13/2021

3 - Boolean Logic Functions

Lectures 9 & 10

Read text Chapter 2, Try Problem 5

C_N_9-13-2021

9/16/2021

3 - Boolean Logic Functions

Lectures 11 & 12

Read text Chapter 2, Try Problem 6

C_N_9-16-2021

9/20/2021

3 – All NAND Implementation

Lectures 13 & 14

Read text Chapter 2,Try Problem 7

C_N_9-20-2021

9/23/2021

4-Simplification Using K-Map

Lectures 15 & 16

Read Text Chapter 3,Try Problem 8

C_N_9-23-2021

9/27/2021

4-Simplification Using K-Map

Lectures 17 & 18

Read Text Chapter 3,Try Problem 9

C_N_9-27-2021

9/30/2021

5-Design of Combinational Circuits

Lectures 19 & 20

Read Text Chapter 3,Try Problem 10

C_N_9-30-2021

10/4/2021

Test 1

 

 

Test 1 - Key

10/7/2021

5-Design of Combinational Circuits

Lectures 21& 22

Read Text Chapter 3, Try Problem 11

C_N_10-7-2021

10/14/2021

Design of Decoders

Lectures 23 & 24

Read Text Chapter 3, Try Problem 12

C_N_10-14-2021

10/18/2021

Design of Encoder / Mux/ DeMux

Lectures 25 & 26

Read Text Chapter 3, Try Problem 13

C_N_10-18-2021

10/21/2021

6- Programmable Logic Devices

Lectures 27 & 28

Try Problem 14

C_N_10-21-2021

10/25/2021

7- Design Using Verilog

Lectures 29 & 30

Read Text Chapter 4, Try Problem 15

C_N_10-25-2021

10/28/2021

7- Design Using Verilog
8- Latches

Lectures 31 & 32

Read Text Chapter 5, Try Problem 16

C_N_10-28-2021

11/1/2021

8- Flip-flops and Ripple Counters

Lectures 33 & 34

Read text Chaper 5 & Try Problem 17

 C_N_11-1-2021

11/4/2021

8- Asynchronous and Synchronous Circuits

Lectures 35 & 36

Read text Chaper 5 & Try Problem 18

 C_N_11-4-2021

11/8/2021

8- Analysis of Sequential Circuits

Lectures 37 & 38

Read text Chaper 5 & Try Problem 19

C_N_11-8-2021

11/11/2021

Test 2

 

 

Test 2 - Key

11/15/2021

8- Design of Sequential Circuits

Lectures 39 & 40

Read Text Chapter 5, Try Problem 20

C_N_11-15-2021

11/18/2021

8- Sequential Circuits

 

Read Text Chapter 5, Try Problem 21

C_N_11-18-2021

11/22/2021

8- Verilog in Sequential Circuits 

Lectures 41 & 42

Read Text Chapter 5, Try Problem 22 

C_N_11-22-2021

11/29/2021

8- Design of Finite State Machine

Lectures 43 & 44

Try Problem 23

C_N_11-29-2021

12/2/2021

8- Design of a Controller

Lectures 45

Read Text Chapter 5, Try Problem 24 

C_N_12-2-2021

12/6/2021

Review

 

 

C_N_12-6-2021

12/16/2021

Final Exam

 

10:15 AM – 12:15 PM

Final_Key

 

Homework Assignments

Homework Number
Due Date
Solution
HW 1 9/16/2021 HW1_Key
  HW 2 9/23/2021 HW2_Key
  HW 3 9/30/2021 HW3_Key
  HW 4 10/25/2021 HW4_Key
  HW 5 11/8/2021 HW5_Key
  HW 6 12/2/2021 HW6_Key
     

ZyBook Activity Assignments:

To view the assignments, you need to login to your ZyBook account and use the assignment tab.

ZyBook activity
Due Date
Assignment 1 9/17/2021
Assignment 2 9/24/2021
Assignment 3 10/1/2021
Assignment 4 10/29/2021
Assignment 5 11/9/2021
Assignment 6 12/3/2021
   

Quiz Keys:

Quiz Key

Lecture Notes:

Bullet 1 Number Systems
Bullet 2 Boolean Logic
Bullet 3 Boolean Logic Functions
Bullet 4 Simplification Using K-Map
Bullet 5 Design of Combinational Circuits
Bullet 6 Programmable Logic Devices
Bullet 7 Design Using Verilog
Bullet 8 Sequential Circuits
Bullet 9 Sequential Circuits II
Bullet 10 Design Using Verilog II

 

Tutorials:

BulletIntroduction to Verilog
BulletTutorial on Quartus II Schematic Capture
BulletTutorial on Quartus II Verilog
BulletTutorial on using DE-series boards
BulletDE-series boards manual
BulletPin assignment for DE-series boards

BulletYoutube Quartus II Tutorial Designing a simple Circuit

BulletYoutube Creating a Waveform Simulation for Altera Quartus
BulletYoutube Quartus II Tutorial
BulletHow to Connect to Campus Classroom Computers Remotely
BulletDE10 Lite User Manual
BulletDE10 Lite and Quartus Set UP
 
 

 

Relevant Web Sites

Bullet Digital Logic Fundamentals
Bullet Digital logic tutorial
Bullet Combinational Logic Tutorial
Bullet

Texas Instruments Digital Logic Families

Bullet Biography of George Boole

 

Handouts

 

bullet Some basic hints and suggestion on breadboarding
bullet Digital Symbols (you may download it for your lab reports and homeworks)
 
bullet PLD Symbol
Bullet Chapter two class notes
Bullet Chapter three class notes
Bullet Chapter four class notes
Bullet Kmap

Additional practice problems

 


Last updated on Thursday, December 16, 2021 1:09 PM
 
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