New Paltz sign

Division of Engineering Programs
State University of New York - New Paltz

Baback A. Izadi, Ph.D.

Email: bai@engr.newpaltz.edu
Phone: (845) 257 - 3823
FAX : (845) 257 - 3730

Course Title: Digital Logic Fundamentals
Course Number:
EGC220
Credit: 3
Prerequisite: MAT251
Corequisite: EGC221

 

Fall 2017

Meeting Days: Monday - Thursday
Meeting Time:

  • Section 1: 11:00 AM - 12:15 PM
  • Section 2: 2:00 PM - 3:15 PM

Meeting Room: REH 211 (Section 1) and WH221 (Section 2)

 

Syllabus

Teaching Assistant

Bullet

Smit Dineshbhai Khatri: khatris1@hawkmail.newpaltz.edu

Bullet Harsh Parikh: parikhh1@hawkmail.newpaltz.edu

IEEE - HKN Tutor: Mikaela Stiklickas stiklicm1@hawkmail.newpaltz.edu

Textbook:

 "Digital Design," online textbook by ZyBooks (all students enrolled in the class has access to it and will be used partially for assignments). The cost to subscribe is $48 and it will be valid through 1/7/2017. To get access:

  1. Sign up at zyBooks.com: https://learn.zybooks.com/zybook/NEWPALTZEGC220IzadiFall2017
  2. Enter zyBook code NEWPALTZEGC220IzadiFall2017
  3. Click Subcribe
  4. Choose the appropriate section

Activities prior to each lecture:

Lecture Date Lecture Note

Watch Lecture Video

on Blackboard

Additional Activity Copy of class board notes
8/31/2017
Lectures 1 & 2

Read text Chaper 1,
Try Problems 1

 
9/7/2017
Lectures 3 & 4
Read text Chaper 1,
Try Problems 2
 
9/11/2017
Lectures 5 &6
Read text Chaper 1,
Try Problems 3
9/14/2017
Lectures 7 & 8

Read text Chapter 2, see sample operations
Try Problem 4

9/18/2017
Lectures 9 & 10

Read text Chapter 2,
Try Problem 5

9/21/2017
Lectures 11 & 12
Read text Chapter 2,
Try Problem 6
9/25/2017
Lectures 13 & 14
Read text Chapter 2,
Try Problem 7
9/28/2017
Lectures 15 & 16

Read Text Chapter 3,
Try Problem 8

10/2/2017
Review Notes,
Test 1, Practice Problems
10/5/2017
Lectures 17 & 18
Read Text Chapter 3,
Try Problem 9
10/12/2017
Lectures 19 & 20
Read Text Chapter 3,
Try Problem 10
10/16/2017
Lectures 21& 22
Read Text Chapter 3,
Try Problem 11
10/19/2017
Lectures 23 & 24
Read Text Chapter 3,
Try Problem 12
10/23/2017
Lectures 25 & 26
Read Text Chapter 3,
Try Problem 13
10/26/2017
Lectures 27 & 28
Try Problem 14
10/30/2017
Review Notes
Test 2, Practice Problems (Practice Problems_Solution)
11/2/2017
Lectures 29 & 30
Read Text Chapter 4, Try Problem 15
11/6/2017
Lectures 31 & 32
Read Text Chapter 5, Try Problem 16
11/9/2017
Lectures 33 & 34
Read text Chaper 5 & Try Problem 17
11/13/2017
Lectures 35 & 36
Read text Chaper 5 & Try Problem 18
11/16/2017
Lectures 37 & 38
Read text Chaper 5 & Try Problem 19
11/20/2017 8- Sequential Circuits
Lectures 39 & 40
Read Text Chapter 5,
Try Problem 20
11/27/2017 8- Sequential Circuits   Read Text Chapter 5,
Try Problem 20
11/30/2017
Review Notes
  Test 3, Practice Problems
12/4/2017
Lectures 41 & 42
Read Text Chapter 5,
Try Problem 21 
12/7/2017 8- Sequential Circuits  Lectures 43 & 44 Try Problem 22
12/11/2017 8- Sequential Circuits  Lectures 45 Read Text Chapter 5,
Try Problem 23 

 

Homework Assignments

Homework Number
Due Date
Solution
9/21/2017
9/28/2017
10/12/2017
10/26/2017
HW #5 11/16/2017 Key HW#5
HW #6 11/27/2017 Key HW#6
HW #7 12/7/2017 Key HW#7

ZyBook Activity Assignments:

ZyBook activity
Due Date
Do problems in Chapter 1
9/21/2017
Do problems in Chapter 2
9/28/2017
Do problems in Chapter 3
10/26/2017
Do Problems in Chapter 4, 5.1 and 5.2 11/16/2017
Do remaining sections in Chapter 5 (5.3 - 5.15) 12/11/2017

Tests:

Tests
Date
 

10/2/2017 LC 102

(8:00 PM - 9:15 PM)

10/30/2017 LC 102

(8:00 PM - 9:15 PM)

11/30/2017 LC 102

(8:00 PM - 9:15 PM)

Final, closed book, closed note, comprehensive

12/19/2017
2:45 PM - 4:45 PM
LC 102

Lecture Notes:

Bullet 1 Number Systems
Bullet 2 Boolean Logic
Bullet 3 Boolean Logic Functions
Bullet 4 Simplification Using K-Map
Bullet 5 Design of Combinational Circuits
Bullet 6 Programmable Logic Devices
Bullet 7 Design Using Verilog
Bullet 8 Sequential Circuits
Bullet 9 Sequential Circuits II
Bullet 10 Design Using Verilog II

 

Tutorials:

BulletIntroduction to Verilog
BulletTutorial on Quartus II Schematic Capture
BulletTutorial on Quartus II Verilog
BulletTutorial on using DE-series boards
BulletDE-series boards manual
BulletPin assignment for DE-series boards

BulletYoutube Quartus II Tutorial Designing a simple Circuit

BulletYoutube Creating a Waveform Simulation for Altera Quartus
BulletYoutube Quartus II Tutorial
 

 

Relevant Web Sites

Bullet Digital Logic Fundamentals
Bullet Digital logic tutorial
Bullet Combinational Logic Tutorial
Bullet

Texas Instruments Digital Logic Families

Bullet Biography of George Boole

 

Handouts

bullet Some basic hints and suggestion on breadboarding
bullet Digital Symbols (you may download it for your lab reports and homeworks)
 
bullet PLD Symbol
Bullet Chapter two class notes
Bullet Chapter three class notes
Bullet Chapter four class notes
Bullet Kmap

Additional practice problems

 


Last updated on Wednesday, December 13, 2017 5:23 PM
 
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