Dr. Baback Izadi


		Division of Engineering Programs State University of New York - New Paltz

Baback A. Izadi, Ph.D.

Email: bai@engr.newpaltz.edu
Phone: (845) 257 - 3823
FAX : (845) 257 - 3730

Course Title: Design and Verification of System on Chip
Course Number: EGC455
Credit: 3
Prerequisite: EGC320, EGC442, EGC445, and EGC446

Fall 2023

Meeting Days: Monday and Thursday
Meeting Time: 9:30 AM - 10:45 AM
Meeting: Wooster 221

Co-Instructor :

Course Projects

Activities prior to each lecture:

The course is setup in as a blended or a hybrid format. Therefore, it requires that, before coming to each lecture session,

you have a printed copy of PowerPoint lecture notes for that session,
you have watched the assigned lecture videos in Blackboard (under Lecture Videos) and have made appropriate notes on your lecture notes,

The purpose of the lecture sessions is to discuss issues, answer questions, and help you solve problems.

Textbook and Parts:

The UVM Primer, An Introduction to the Universal Verification Methodology, Ray Salemi, ISBN 9780974164939

Topics:

Verification Topics (Monday)	System on Chip Topics (Thursday)
1. Hardware Functional Verification Day1 2. Hardware Functional Verification Day 2 3, Hardware Functional Verification Day 3	1. Intro to System-on Chip
4. Introduction to Verilog 5. System Verilog 6. TestBench Examples for System Verilog	2. Review of Data Types/Sizes/Math/Logic
Object Oriented Programming 7. Conventional Verification Test Bench	3. Intro to the DE10-Nano Development System
8. System Verilog Interface	4. Intro to the FPGA
9. Packages, Polymorphism, Static Variables	5. Hardware Review
10. Parameterization, Factory & Object Oriented Testbench
11. UVM Tests and Components	Final Project

Last updated on Thursday, June 1, 2023 2:22 PM